View MP4652_7729764.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MP4652 high performance off-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 1 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the MP4652 is a high-performance, off-line led driver designed to power leds for high- power isolated applications, such as lcd tv backlighting. it is available in a 16-pin soic package. the MP4652 can operate at a fixed operating frequency or a variable frequency controlled externally. it outputs two 180-degree phase- shifted driver signals for various external power stages, like llc, half bridge and flyback. its enhanced 9v gate driver can sufficiently drive the external mosfets and directly drives the external gate drive transformer. the MP4652 implements fast and continuous pwm dimming for leds. it outputs a driver signal to directly dim the led current through a dimming mosfet and achieves fast pwm dimming. it provides continuous gate driver signals to the power stage to the whole pwm dimming cycle that eliminates the audible noise: the MP4652 can achieve 1000:1 pwm dimming ratio without any audible noise issue. the pwm dimming is controlled by either a dc input voltage or a direct pwm signal. the dc input pwm dimming frequency can be synchronized by an external signal. the built-in fault management features include open led protection, short led protection, protection against shorts along any point of the led string to ground, and over temperature protection. the protection interface is flexible and is easy to use. at fault protection, system can be set up with auto-recovery or latch up. features ? llc, half bridge or flyback controller ? fast and continuous pwm dimming with audible noise elimination ? 1000:1 pwm dimming ratio ? input voltage range from 9v to 30v ? 9v enhanced gate driver ? fixed or externally programmable operating frequency ? dc or pwm input dimming control ? dc input pwm dimming frequency synchronization ? smart fault protection interface ? open and short led string protection ? protection against shorts along the led string to ground ? built-in fault management ? system auto recovery or latch up at fault protection ? available in soic 16 package ? pin-to-pin with mp4651 applications ? flat-panel video displays ? street lighting for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. the MP4652 is covered by us patents 6, 683,422, 6,316,881, and 6,114,814. other pa tents pending.
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 2 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. simplified typical application vin en pwm 400v gnd 400v ref ref ovp 1 10 11 12 5v* (see note) ocp pwmout pwmout sync en fb vcc bfs fset ft gnd gl pwmout vin gr ovp pwmin comp 1 2 3 4 5 6 7 8 9 MP4652 13 14 15 16 ssd ovp1 ocp 400v gnd . . . . . . ovp2 ovp 2 ref fcomp fcomp iref MP4652 llc application: recommended for pwm dimming frequencies from 100hz to 2khz *note: the 5v could be an accurate reference voltage generated from a tl431. vin en dim 400v gnd 400v ref ref fb ovp 10 11 12 fb ocp pwm out pwm out sync en fb vcc bfs fset ft gnd gl pwmout vin gr ovp pwmin comp 1 2 3 4 5 6 7 8 9 MP4652 13 14 15 16 ssd sync sync sync ovp ocp 400v gnd . . . half bridge application: recommended for pwm dimming frequencies greater than 2khz
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 3 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number* package top marking free air temperature (t a ) MP4652es soic16 MP4652es -20c to +85c * for tape & reel, add suffix ?z (e.g. MP4652es?z) for rohs compliant packaging, add suffix ?lf (e.g. MP4652es?lf?z) package reference ovp sync ssd fb gr gnd gl vcc 1 2 3 4 16 15 14 13 vin en pwmin bfs 12 11 10 9 comp ft pwmout fset 5 6 7 8 top view pin 1 id absolute maxi mum ratings (1) input voltage v in .......................................... 35v vcc, gl, gr .............................-0.3v to +10.7v fb, ssd ....................................... - 5.8v to +5.8v other pins .................................... - 0.3v to +6.5v continuous power dissipation (t a = 25c) (2) ??????????????????.1.56w junction temperature ...............................150c lead temperature (solder).......................260c operating frequency .............. 20khz to 150khz storage temperature............... - 55c to +150c recommended operating conditions (3) input voltage v in .................................9v to 30v maximum junction temp. (t j ) ..................125c thermal resistance (4) ja jc soic16 ...................................80 ...... 35 ... c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperatur e tj(max), the junction-to- ambient thermal resistance ja, and the ambient temperature ta. the maximum allowable c ontinuous power dissipation at any ambient temperature is calculated by pd(max) = (tj(max)-ta)/ ja. exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 4 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics v in = 12v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units gate driver gl, gr gate pull-down resistance r gd 2 ? gate pull-up resistance r gu 4 ? output source current i source 1 a output sink current i sink 2 a maximum duty cycle d max 46% en en turn on threshold v en-on 2 v en turn off threshold v en-off 1 v internal pull-down resistor r en-in 60 k ? brightness dimming control range (pwmin) pwm full scale v pwm dc input pwm dimming 1.1 1.2 1.3 v pwm logic input threshold v th-pwm pwm dimming 1.6 1.9 2.2 v pwm logic input hysteresis v th-pwm-hyst pwm dimming 0.1 v burst frequency set (bfs) source current i src(bfs) v bfs = 2v 120 140 170 a lower threshold v v(bfs) 2.2 2.4 2.6 v upper threshold v p(bfs) 3.3 3.55 3.8 v supply current supply current (enabled) i in-en no driver output 1.5 2.5 ma supply current (disabled) i in-off v in = 30v 1 a operating frequency f o 25k ? fset to gnd 46.5 50 53.5 khz frequency set voltage v fset 1.14 1.2 1.25 v output pwm dimming signal for led (pwmout) logic high voltage v h-pwmout normal operation 5 6 6.5 v logic low voltage v l-pwmout at fault condition, 25k ? fset to gnd 0.1 0.6 v output pwm source current i source_pwmout 100pf on pwmout pin 3 ma output pwm sink current i sink_pwmout 100pf on pwmout pin 20 ma led current feedback (fb) magnitude |v fb | 0.57 0.6 0.63 v input resistance r fb_in 30 k ? over voltage protection (ovp) over voltage protection threshold v th(ovp) 2.22 2.38 2.55 v
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 5 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics (continued) v in = 12v, t a = 25c, unless otherwise noted. parameter symbol condition min typ max units fault timer (ft) threshold v th(ft) 2.2 2.4 2.6 v source current i source(ft) 8 a comp clamp voltage v comp 0.60 v reference current i comp+ fb = 0v 20 a pull down current at fault condition i comp-fault fault mode is triggered 30 a burst frequency synchronization (sync) high logic level v sync-h 1.4 v low logic level v sync-l 0.7 v pulse width t sync 6 20 s synchronizing frequency f sync dc input pwm dimming, compared to the frequency f bfs set by bfs pin r and c 110% 120% f bfs fault detection threshold (ssd, fb) ssd threshold v ssd 2.22 2.36 2.55 v ssd detection delay time t d_ssd 7 s fb threshold v fb 1.1 1.2 1.3 v fb detection delay time t d_fb 7 s vcc voltage v vcc no load 8.7 9.7 10.5 v current i vcc 20 ma
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 6 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions pin # name description 1 ovp over voltage protection. the output voltage is sens ed by this pin through a voltage divider. if the voltage at ovp exceeds 2.38v for 7 s, the fault mode is triggered. 2 sync synchronization. for burst dimming frequency. a pplication of a narrow-pulse synchronizing signal on this pin will synchronize the burst frequency on bfs pin. the frequency of the synchronizing signal should be higher than the frequency set by bfs pin. 3 ssd short string detection. a comparator is integrated in this pin for short string protection. if the voltage on this pin falls below 2.36v for 7s, the fault mode is triggered. 4 fb led current feedback input. the average voltage at this pin is regulated to 0.6v by an internal error amplifier. the voltage on this pin is also used for shor t string detection. when the voltage on this pin goes higher than 1.2v for 7s, the ic recogni zes this as short string condition and triggers the fault mode. for fixed-operating?frequency pwm-controlled ap plications?such as half-bridge, flyback or other topologies?shunt a current-sensing resist or from the cathode of the led to ground and use a sample-hold circuit to feed the led cu rrent to fb pin. the sample-hold circuit should hold the sensed current value on fb pin at pwm off interval. for frequency controlled applications, like the llc topology, the led current is regulated through an external amplifier, pull fb to ground and let ic operate with maximum duty cycle. 5 comp feedback compensation node. for fixed-operat ing?frequency pwm-controlled applications, connect a compensation capacitor or an r-c network from this pin to gnd. for frequency controlled applications, like the llc topology, connect a 1nf cap on this pin. 6 ft fault timer. connect a timing capacitor from this pin to gnd to set the fault timer to recover the system. when the voltage on this pin goes higher than the 2.38v threshold, the ic recovers. if the system requires a latch up for fault mode, connect a resistor smaller than 250k ? to this pin. 7 pwmout pwm dimming control output. this pin outputs the pwm dimming driver signal to the led dimming mosfet for fast pwm dimming. in fault mode pwmout is pulled low. 8 fset frequency set. the source current through th is pin determines the operating frequency of the MP4652. for fixed-operating?frequency pwm-controlled appl ications, connect a resistor from this pin to gnd to set the operating frequency. for typical applications, a 25k ? resistor sets the operating frequency at 50khz. for frequency controlled applications (like llc) , apply the control voltage (the output of the regulation loop) to this pin through a resist or. this control voltage programs the source current through the fset pin and thus controls the operating frequency. 9 bfs burst frequency set. for dc input pwm dimmin g. connect a resistor in parallel with a capacitor from bfs to gnd. the resistor and capacitor programs the burst frequency. for direct pwm input pwm dimming, pull up bfs to vcc with a 20k ? resistor and apply the pwm signal to the pwmin pin. 10 pwmin pwm dimming control input. for dc input pwm dimming, the voltage range from 0 v to 1.2v at pwmin linearly sets the pw m dimming duty cycle from 0 to 100%. for direct pwm input pwm dimming, directly apply the pwm signal on this pin. the MP4652 has positive dimming polarity.
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 7 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions (continued) pin # name description 11 en enable input. pull en high to turn on th e chip, and pull en low to turn it off. 12 vin supply voltage input. 13 vcc linear regulator output and bias supply of the gate driver. it provides the supply for the gate driver and also the external control circui t, the typical value is 9.7v. bypass vcc with a 1 f or larger ceramic capacitor. 14 gl driver signal output, 180 degree phase shifted from gr 15 gnd ground. 16 gr driver signal output, 180 degree phase shifted of gl
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 8 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. block diagram ovp fb fset comp 1 4 5 8 0.6v 2.38v ssd 3 2.36v pulse width modulation pwmin 10 pwmout 7 driver en 11 ft 6 2.38v gr 16 gate driver gl 14 vin 12 regulator vcc 13 gm 1.2v dc l/r bfs 9 sync 2 burst dimming signal generator fault management figure 1?MP4652 block diagram
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 9 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operation steady state and enable control the MP4652 is a high-performance, off-line led driver specifically designed for high-power isolated applications such as led backlighting for tvs. powered by a 9v to 30v input supply, the MP4652 outputs two 180-degree phase- shifted gate driver signals for external power stages. its enhanced 9v gate driver provides adequate driver capability to the external mosfets and directly drives the external mosfets through a gate drive transformer. the MP4652 can be used to control llc, half-bridge, flyback, and other power stages. the MP4652 can accurately regulate the led output current using both pwm control and a compensation network on the comp pin. pwm control uses an external resistor connected from fset pin to gnd to set the operating frequency. the led current feeds back to the fb pin with a sample-hold circuit and compared against an internal 0.6v reference voltage. the compensation network on the comp pin, which connects to the output of the error amplifier, then accurately regulates the output led current. the voltage on comp pin is compared with the internal oscillator and generates duty cycle modulated signals to control the external power switches. this pwm control makes MP4652 suitable for half-bridge, flyback, and other power stages. the MP4652 fset pin can also take voltage feedback from a frequency-controlled external circuit to adjust the device frequency. connect this feedback circuit to fset using a resistor. this frequency control makes MP4652 suitable for llc and other frequency-controlled power stages. the system power is controlled by en pin. when the chip is enabled, the built-in regulator for vcc powers up the internal circuit. when vcc exceeds its uvlo point, ic starts to operate and outputs the gate drive signals. brightness control MP4652 implements pwm dimming on the led current by using either a dc input voltage or a direct pwm input signal. the MP4652 has a built-in burst oscillator that can generate a triangle waveform on the bfs pin. when using a dc input voltage for pwm dimming, connect a capacitor in parallel to a resistor on bfs pin to set the burst frequency and apply the dc voltage to the pwmin pin to program the pwm dimming duty cycle. the burst frequency can also be synchronized to an external frequency by applying a synchronizing narrow-pulse signal on the sync pin. the synchronizing frequency should be higher than the burst frequency set by the bfs pin. please refer to sync pin description for details. when using a direct pwm input signal for pwm dimming, use a 20k ? pull-up resistor between the bfs pin to vcc and apply the pwm signal on pwmin pin. continuous fast pwm dimming the MP4652 implements fast and continuous pwm dimming on the led current, as shown in figure 2. the pwm dimming signal (controlled by a dc input voltage or a direct pwm signal) outputs from the pwmout pin to drive the external dimming mosfet in series with the led string. therefore, the led current quickly rises when the pwm dimming signal goes high, and quickly falls when pwm dimming signal falls. this fast pwm dimming feature helps the MP4652 achieve a high pwm dimming ratio. the MP4652 provides continuous pwm dimming to the system. it outputs continuous gate driver signals to the power stage during both pwm on and pwm off intervals. this makes the power flow continuous for magnetic components?such as transformers and inductors?which can eliminate audible noise. with this fast and continuous pwm dimming feature, the MP4652 can achieve 1000:1 high
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 10 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pwm dimming ratio at a 120hz pwm dimming frequency without any audible noise issue (or 500:1 pwm dimming ratio at 300hz pwm dimming frequency). pwmout i led pwmin comp gate figure 2? fast and continuous pwm dimming fault protection system fault management features include open led protection, short led protection if at any point the led string shorts to ground, protection against shorts along the led string, and a delay timer for system recovery. the output voltage is monitored by the ovp pin through a voltage divider. once the open led condition occurs and the voltage on the ovp pin exceeds 2.38v for 7 s, the MP4652 recognizes this as open condition and triggers the fault mode. the ssd pin monitors the secondary side current. if any point of the led string is shorted to ground, the secondary side current increases. when the voltage on ssd pin falls below 2.36v for 7 s, the MP4652 triggers the fault mode. the fb pin can also function as short led string protection. when the voltage on fb pin is higher than 1.2v for 7 s, the ic triggers the fault mode. in fault mode, the outputs of the gate drivers gl and gr are disabled, the pwmout signal is pulled low, and the comp capacitor is discharged by a 30 a current source. the fault timer then starts. an 8 a current source charges the ft capacitor, and when ft voltage hits 2.38v, the system recovers. the ic enables the output driver signals, releases the comp, resets the fault flag, and pulls down the ft pin. if the design requires a latch up for the ic at fault mode, connect a 200k ? resistor on the ft pin.
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 11 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. application information pin 1 (ovp): this pin is used for over-voltage protection. when the output voltage to this pin exceeds 2.38v for 7 s, the fault mode is triggered. for applications involving multiple led strings, apply the maximum output voltage of the led strings to this pin. pin 3 (ssd): this short string detection pin is used for protection against shorts along any point of the led string to ground. the ssd pin monitors the secondary side current. when the voltage on this pin falls below 2.36v for 7 s, the ic treats the condition as a short and triggers the fault mode. pin 4 (fb): this pin is used for led current regulation. the voltage on this pin is regulated by an external circuit with a 0.6v average value. use a sample- hold circuit to sense the led current when the pwm goes high, and hold the value when the pwm goes low. the fb pin also functions as short string protection. when the voltage on fb exceeds 1.2v for 7 s, the ic triggers the fault mode. for frequency-controlled application like an llc power stage, the led current is regulated with an external-frequency control loop. connect fb to ground and set the ic to operate at the maximum duty cycle. pin 5 (comp): this pin is used for compensation purposes. for pwm-controlled applications, such as half-bridge and flyback power stages, connect an x7r ceramic capacitor with a value between 47nf and 470nf from comp to gnd. the value of this capacitor determines the stability of the led current regulation. for frequency-controlled applications like the llc power stage, connect a 1nf capacitor to the comp pin. pin 6 (ft): connect a capacitor from this pin to gnd to set the fault timer. this sets the system recovery time after detecting a fault condition. a c v t ft ft 8 38 . 2 = a 10nf capacitor on ft sets the delay time to around 3ms if the circuit requires a latch-up for fault mode, connect this pin to a 200k ? resistor. pin 8 (fset): this pin is used to set the operating frequency. the source current through this pin determines the operating frequency. for fixed-operating?frequency pwm-controlled applications?like half-bridge and flyback power stages?connect a resistor from this pin to gnd to set the operating frequency (f o ). the value for this resistor r fset is calculated by o fset f r 9 10 25 . 1 = for an operating frequency of 50khz, r fset = 25k ? . for frequency-controlled applications like llc, connect the control voltage to fset pin through a resistor, as shown in figure 3. this control voltage programs the source current through this pin to control the operating frequency. fset i ref i led MP4652 v control figure 3?fset set up for frequency controlled application.
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 12 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin 7 (pwmout): this pin outputs the pwm dimming signal to drive the dimming mosfet in series with the led string for fast pwm dimming. connect this pin to the gate of the dimming mosfet through a driver resistor. pin 10 (pwmin): this pin is used for pwm-dimming brightness control. for dc-input pwm dimming, the dc voltage controls the pwm dimming duty cycle on the output. the signal should be filtered for optimal operation. a voltage in the range of 0v to 1.2v on pwmin programs the pwm dimming duty cycle from 0 to 100%. for direct pwm input pwm dimming, pull bfs high to vcc through a 20k ? resistor, and connect the pwmin pin directly to the pwm source. logic high is pwm on and logic low is pwm off. pin 9 (bfs): bfs pin is used to set the burst frequency for dc input pwm dimming, using the waveform shown in figure 4. connect a resistor (r bfs ) in parallel with a capacitor (c bfs ) on this pin to set the burst frequency. bfs 2.4v 3. 55v burst dimming signal i led burst dimming frequency rising time gate figure 4?pwm dimming with dc input voltage at pwmin pin these values are determined as follows: set a percentage of the rising time, where: burst rise rise f t d = r bfs and c bfs are determined by: k d k r rise bfs 43 . 21 1 1 16 . 21 + ? ? ? ? ? ? ? ? ? 405 . 0 1 ? = bfs burst rise bfs r f d c for d rise = 0.1, f burst = 200hz, then r bfs = 212k ? , c bfs = 52nf. d rise is recommended between 0.1 and 0.2. for direct pwm input pwm dimming, pull bfs high to vcc through a 20k ? resistor and apply the pwm signal to pwmin pin. pin 2 (sync): this pin is used for burst frequency synchronization to synchronize the dc input pwm dimming frequency. application of a small- pulse synchronizing frequency signal will synchronize the burst frequency. sync en fb vcc bfs fset ft gnd gl pwmout vin gr ovp pwmin comp 1 2 3 4 5 6 7 8 MP4652 14 15 16 ssd 10 11 12 sync signal 9 ref 13 a bfs i led burst dimming signal 1.2v 3.55v 2.4v sync signal a figure 5?synchronized dc input pwm dimming and schematic
MP4652?high performance o ff-line tv led driver MP4652 rev.1.01 www.monolithicpower.com 13 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. figure 5 shows synchronized pwm dimming with dc input. the synchronizing signal is filtered by a high pass filter. its rising edge is caught and used to synchronize the triangle waveform on the bfs pin. the synchronizing frequency should be higher than that set by bfs pin and the amplitude of the synchronizing signal should be higher than 1.4v. table 1?function mode pin connection function pwmin bfs sync pwm dimming with dc input voltage *0v to 1.2v c bfs , r bfs gnd pwm dimming with dc input voltage and synchronizing frequency *0v to 1.2v c bfs , r bfs r,c,d network pwm dimming with direct pwm input pwm to vcc through 20k ? resistor gnd note: *: burst brightness polarity: 100% duty cycle at pwm voltage 1.2v. pin 11 (en): pull this pin high to enable the chip, and pull it low to disable the chip. pin 12 (vin): supply voltage input. bypass the supply voltage with a 0.1 f or larger ceramic capacitor pin 13 (vcc): this pin provides the gate driver supply voltage. its typical value is 9.7v. connect a 1 f or greater ceramic capacitor to this pin to bypass the supply voltage. this voltage is also used to supply the external control circuit. pin 14(gl), pin 16 (gr): gate driver signals output. gl and gr are 180- degree phase-shifted driver signals. gl and gr can directly drive the external mosfets in the off-line system through a gate driver transformer with enhanced driver capability. connect two 5.1 ? resistors in series with gl and gr to reduce the emi noise. place a 2.2nf y capacitor between the primary reference ground and the secondary reference ground.
MP4652?high performance o ff-line tv led driver MP4652 rev. 1.01 www.monolithicpower.com 14 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. example application tv led backlight this application example introduces a high performance 2-stage llc tv led driver that is designed to power the led backlights for a 40- inch tv. the total system power structure is shown in figure 6. it uses a 2-stage structure with high efficiency and low cost. the pfc stage outputs around 390v and is controlled by the mps pfc controller mp44010, which works in bcm (boundary conduction mode). the MP4652 acts as the led driver stage: it controls a llc power stage to drive the led strings. another flyback dc/dc stage outputs the 13v power supply for the system: it uses the mps quasi- resonant flyback controller hfc0100. pfc stage mp44010 ac input led driver stage MP4652 llc . . . led strings flyback dc/dc hfc0100 13v/3a pfc_390v . . . figure 6?system power structure the following introduces the detailed circuit of the led driver stage based on MP4652. the specifications for this led driver are listed below. specification: input: typically 390v, pfc output. output: 4 strings at 55v/260ma per string, connecting 2 strings in series. it could also output 2 strings at 110v/260ma per string. operating frequency: ~110khz pwm dimming frequency: 320hz protection: open led protection, short led string protection, short led+ to gnd protection schematics: figure 7 shows the schematic of the led driver stage. the parameters of the power transformer t2 are as follow: np: ns = 65:35, leakage inductance = 450 h, magnetic inductance = 1.6mh.
MP4652?high performance o ff-line tv led driver MP4652 rev. 1.01 www.monolithicpower.com 15 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. figure 7?MP4652based 2-stage llc tv led drive llc power stage open protection led current regulation MP4652 short protection system error signal
MP4652?high performance o ff-line tv led driver MP4652 rev. 1.01 www.monolithicpower.com 16 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. power stage the power stage is a half-bridge llc topology. the primary side is composed of q4, q3, c19 and t2. the llc resonant network is composed of the leakage inductance of t2, the magnetic inductance of t2, and c19. q4 and q3 should be chosen to handle the input voltage and the llc current. consider the operating frequency, the input condition and the output condition when selecting the resonant cap, the leakage inductance, and the magnetic inductance. refer to MP4652 llc design notes for details. on the secondary side, the diodes d6, d8, d9, and d10 rectify the llc current. these diodes must be able to handle the output voltage and the output current: they are 200v/3a diodes in this circuit. the balance cap c23 blocks the different voltage of the 2 led strings and balances the currents through them. the value of c23 is usually between 0.22 f and 1 f. its voltage must be higher than the output voltage because of the led string short condition. the output capacitors c28 and c29 filter the ripple current of the llc output current to obtain a dc current for the led strings. c28 and c29 also store the energy from the primary side at the pwm off interval, as MP4652 implements continuous gate driver at pwm off interval to eliminate the audible noise. the value of c28 and c29 must be large enough to handle this energy to prevent excessive output voltage spikes: capacitor values from 4.7 f to 22 f are typical for this application. the voltage stress of these output capacitors should be higher than the maximum output voltage. control circuit MP4652 controls the power mosfets q3 and q4 in the power stage through the gate driver transformer t1. as MP4652 outputs regulated 9v gate driver signals, the turn ratio of t1 goes from 1:1:1 to 1:1.5:1.5. with its enhanced gate driver capability and regulated driver voltage, MP4652 can directly drive the mosfets through the gate driver transformer. because an llc is a frequency-controlled power stage, MP4652 uses an external amplifier u3 to regulate the led current and output the frequency control voltage. during the pwm on interval, pwmout is high and the dimming mosfet q8 turns on. the led current feeds back to the inverting input of u3. with the compensation network, u3 outputs the frequency control voltage and regulates the led current. during the pwm off interval, the dimming mosfet turns off, and led current feedback goes low. an external voltage applied to the inverting input of u3 through d5 pulls the output of u3 low. this design helps the circuit work at a high frequency during the pwm off interval and limits the output energy delivered from the primary side to the secondary side. together with the output capacitors c28 and c29, this circuit helps to eliminate current overshot during pwm on. the signal mosfets q6 and q7 are turned off during the pwm off interval, and c21 and c24 can hold their value during this time. this helps the control loop to respond quickly during the pwm on interval and to achieve fast pwm dimming. r35 and c12 on the fset pin form a frequency soft-start circuit at start up. the maximum output voltage is fed back to ovp pin through the voltage dividers. MP4652 can protect the open led condition through the ovp pin. when the voltage on ovp pin is higher than 2.38v for 7 s, ic enters fault mode. the secondary side current is fed back to ssd pin through r47, r46 and c25. when short condition occurs, the secondary side current grows and the ssd voltage falls. when ssd voltage falls below 2.36v for 7 s, the ic enters fault mode. in fault mode, the pwmout pulls low. the device then outputs an error signal to the system with the addition of an external logic circuit,. please refer to the design notes for details of the components selection.
MP4652?high performance o ff-line tv led driver MP4652 rev. 1.01 www.monolithicpower.com 17 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. circuit performance steady state start up 90% pwm dimming 50% pwm dimming 1% pwm dimming 0.2% pwm dimming gl vled i pri 1.13i led gl vled i pri 1.13i led gl v led 1.13i led i pri gl v led 1.13i led i pri gl v led 1.13i led i pri gl v led 1.13i led i pri
MP4652?high performance o ff-line tv led driver MP4652 rev. 1.01 www.monolithicpower.com 18 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. led current vs. pwm duty cycle 0 50 100 150 200 250 300 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100% pwm duty cycle led current(ma) pwm dimming linearity open led protection short led+ to led- protection short led+ to gnd protection gl ssd ishort error gl vled i pri error gl ssd ishort error
MP4652?high performance o ff-line tv led driver notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP4652 rev. 1.01 www.monolithicpower.com 19 9/23/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information soic16 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150 (3.80) 0.157 (4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.386( 9.80) 0.394(10.00) 0.053(1.35) 0.069(1.75) top view front view 0.228 (5.80) 0.244 (6.20) side view 1 8 16 9 recommended land pattern 0.213 (5.40) 0.063 (1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ac. 6) drawing is not to scale. 0.010(0.25) bsc gauge plane

▲Up To Search▲

Price & Availability of MP4652

	To Download MP4652 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .